Hardware / Components / Processors / TRON — Computers

A Floating-Point VLSI Chip for the TRON Architecture: An Architecture for Reliable Numerical Programming

Abstract of paper on Gmicro/FPU (floating-point unit), defines 23 coprocessor instructions; with references, purchase option. [IEEE Micro] (May 01, 1989)

TRON VLSI CPU

CISC 32-bit processor architecture developed to serve as main hardware building block of the realtime TRON Hypernetwork (Highly Functional Distributed System: HFDS), the ultimate goal of the TRON Project.

The Gmicro/500 Superscalar Microprocessor with Branch Buffers

Abstract of paper on Gmicro/500, with RISC-like dual-pipeline structure to execute basic instructions fast, upward-object-compatible with earlier Gmicro variants; with references, purchase option. [IEEE Micro] (September 01, 1993)

The Gmicro/100 32-Bit Microprocessor

Abstract of paper on Gmicro/100, 32-bit CISC VLSI, based on TRON specification; with references, purchase option. [IEEE Micro] (July 01, 1991)

Computers

TRON resources